Mohamed ABDMOULEH

My task is to design the CMOS Analog Integrated Circuits by following the Analog Flow Design. ( Project Specifications Requirements Schematic Sizing Transistors ( CMOS Process ) Simulation ( Operating Point Gain Phase Noise... ) Layout ( DRC Extract LVS ) Post - Layout Simulation GDSII Layout Virtuoso Diva matching Common Centroide Analog Layout Simulation Eldo & Spectre Design of CMOS Operational Amplifier Verification DRC LVS Cadence Checklists Technology 0.5um...